mirror of https://github.com/cemu-project/Cemu.git
PPCRec: Remove now unused PPC_ENTER and jumpMarkAddress
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874e376361
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@ -1964,8 +1964,8 @@ bool PPCRecompilerX64Gen_imlInstruction_conditionalJump(PPCRecFunction_t* PPCRec
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{
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// deprecated (jump to jumpmark)
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__debugbreak(); // deprecated
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PPCRecompilerX64Gen_rememberRelocatableOffset(x64GenContext, X64_RELOC_LINK_TO_PPC, (void*)(size_t)imlInstruction->op_conditionalJump.jumpmarkAddress);
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x64Gen_jmp_imm32(x64GenContext, 0);
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//PPCRecompilerX64Gen_rememberRelocatableOffset(x64GenContext, X64_RELOC_LINK_TO_PPC, (void*)(size_t)imlInstruction->op_conditionalJump.jumpmarkAddress);
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//x64Gen_jmp_imm32(x64GenContext, 0);
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}
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}
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else
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@ -2135,12 +2135,6 @@ bool PPCRecompilerX64Gen_imlInstruction_cr(PPCRecFunction_t* PPCRecFunction, ppc
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return false;
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}
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void PPCRecompilerX64Gen_imlInstruction_ppcEnter(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction)
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{
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imlInstruction->op_ppcEnter.x64Offset = x64GenContext->codeBufferIndex;
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}
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void PPCRecompilerX64Gen_imlInstruction_r_name(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction)
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{
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uint32 name = imlInstruction->op_r_name.name;
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@ -2346,10 +2340,6 @@ bool PPCRecompiler_generateX64Code(PPCRecFunction_t* PPCRecFunction, ppcImlGenCo
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{
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// no op
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}
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else if( imlInstruction->type == PPCREC_IML_TYPE_PPC_ENTER )
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{
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PPCRecompilerX64Gen_imlInstruction_ppcEnter(PPCRecFunction, ppcImlGenContext, &x64GenContext, imlInstruction);
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}
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else if( imlInstruction->type == PPCREC_IML_TYPE_FPR_R_NAME )
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{
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PPCRecompilerX64Gen_imlInstruction_fpr_r_name(PPCRecFunction, ppcImlGenContext, &x64GenContext, imlInstruction);
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@ -240,10 +240,6 @@ void IMLDebug_DumpSegment(ppcImlGenContext_t* ctx, IMLSegment* imlSegment, bool
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{
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strOutput.addFmt("jm_{:08x}:", inst.op_jumpmark.address);
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}
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else if (inst.type == PPCREC_IML_TYPE_PPC_ENTER)
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{
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strOutput.addFmt("ppcEnter_{:08x}:", inst.op_ppcEnter.ppcAddress);
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}
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else if (inst.type == PPCREC_IML_TYPE_LOAD || inst.type == PPCREC_IML_TYPE_STORE ||
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inst.type == PPCREC_IML_TYPE_LOAD_INDEXED || inst.type == PPCREC_IML_TYPE_STORE_INDEXED)
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{
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@ -286,7 +282,7 @@ void IMLDebug_DumpSegment(ppcImlGenContext_t* ctx, IMLSegment* imlSegment, bool
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strOutput.add("JALW"); // jump always
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else
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cemu_assert_unimplemented();
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strOutput.addFmt(" jm_{:08x} (cr{})", inst.op_conditionalJump.jumpmarkAddress, inst.crRegister);
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strOutput.addFmt(" (cr{})", inst.crRegister);
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}
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else if (inst.type == PPCREC_IML_TYPE_NO_OP)
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{
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@ -177,10 +177,6 @@ void IMLInstruction::CheckRegisterUsage(IMLUsedRegisters* registersUsed) const
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{
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// no effect on registers
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}
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else if (type == PPCREC_IML_TYPE_PPC_ENTER)
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{
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// no op
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}
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else if (type == PPCREC_IML_TYPE_FPR_R_NAME)
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{
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// fpr operation
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@ -535,10 +531,6 @@ void IMLInstruction::ReplaceGPR(sint32 gprRegisterSearched[4], sint32 gprRegiste
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{
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// no effect on registers
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}
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else if (type == PPCREC_IML_TYPE_PPC_ENTER)
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{
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// no op
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}
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else if (type == PPCREC_IML_TYPE_FPR_R_NAME)
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{
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@ -679,10 +671,6 @@ void IMLInstruction::ReplaceFPRs(sint32 fprRegisterSearched[4], sint32 fprRegist
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{
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// no effect on registers
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}
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else if (type == PPCREC_IML_TYPE_PPC_ENTER)
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{
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// no op
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}
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else if (type == PPCREC_IML_TYPE_FPR_R_NAME)
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{
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op_r_name.registerIndex = replaceRegisterMultiple(op_r_name.registerIndex, fprRegisterSearched, fprRegisterReplaced);
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@ -797,10 +785,6 @@ void IMLInstruction::ReplaceFPR(sint32 fprRegisterSearched, sint32 fprRegisterRe
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{
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// no effect on registers
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}
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else if (type == PPCREC_IML_TYPE_PPC_ENTER)
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{
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// no op
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}
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else if (type == PPCREC_IML_TYPE_FPR_R_NAME)
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{
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op_r_name.registerIndex = replaceRegister(op_r_name.registerIndex, fprRegisterSearched, fprRegisterReplaced);
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@ -151,7 +151,6 @@ enum
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PPCREC_IML_TYPE_MACRO,
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PPCREC_IML_TYPE_CJUMP, // conditional jump
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PPCREC_IML_TYPE_CJUMP_CYCLE_CHECK, // jumps only if remaining thread cycles < 0
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PPCREC_IML_TYPE_PPC_ENTER, // used to mark locations that should be written to recompilerCallTable
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PPCREC_IML_TYPE_CR, // condition register specific operations (one or more operands)
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// conditional
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PPCREC_IML_TYPE_CONDITIONAL_R_S32,
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@ -270,7 +269,6 @@ struct IMLInstruction
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uint8 crRegister; // set to 0xFF if not set, not all IML instruction types support cr.
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uint8 crMode; // only used when crRegister is valid, used to differentiate between various forms of condition flag set/clear behavior
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uint32 crIgnoreMask; // bit set for every respective CR bit that doesn't need to be updated
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uint32 associatedPPCAddress; // ppc address that is associated with this instruction
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union
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{
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struct
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@ -322,7 +320,6 @@ struct IMLInstruction
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}op_macro;
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struct
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{
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uint32 jumpmarkAddress;
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bool jumpAccordingToSegment; //IMLSegment* destinationSegment; // if set, this replaces jumpmarkAddress
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uint8 condition; // only used when crRegisterIndex is 8 or above (update: Apparently only used to mark jumps without a condition? -> Cleanup)
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uint8 crRegisterIndex;
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@ -402,7 +399,6 @@ struct IMLInstruction
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type == PPCREC_IML_TYPE_MACRO && operation == PPCREC_IML_MACRO_LEAVE ||
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type == PPCREC_IML_TYPE_MACRO && operation == PPCREC_IML_MACRO_HLE ||
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type == PPCREC_IML_TYPE_MACRO && operation == PPCREC_IML_MACRO_MFTB ||
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type == PPCREC_IML_TYPE_PPC_ENTER ||
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type == PPCREC_IML_TYPE_CJUMP ||
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type == PPCREC_IML_TYPE_CJUMP_CYCLE_CHECK)
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return true;
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@ -430,14 +426,11 @@ struct IMLInstruction
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op_macro.paramU16 = paramU16;
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}
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void make_ppcEnter(uint32 ppcAddress)
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void make_cjump_cycle_check()
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{
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cemu_assert_suspicious(); // removed
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type = PPCREC_IML_TYPE_PPC_ENTER;
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type = PPCREC_IML_TYPE_CJUMP_CYCLE_CHECK;
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operation = 0;
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op_ppcEnter.ppcAddress = ppcAddress;
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op_ppcEnter.x64Offset = 0;
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associatedPPCAddress = 0;
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crRegister = PPC_REC_INVALID_REGISTER;
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}
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void CheckRegisterUsage(IMLUsedRegisters* registersUsed) const;
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@ -123,7 +123,6 @@ bool PPCRecompiler_reduceNumberOfFPRRegisters(ppcImlGenContext_t* ppcImlGenConte
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{
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// convert to NO-OP instruction
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imlInstructionItr.type = PPCREC_IML_TYPE_NO_OP;
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imlInstructionItr.associatedPPCAddress = 0;
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}
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}
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imlIndex++;
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@ -157,19 +157,19 @@ void PPCRecompilerImlGen_generateNewInstruction_jump(ppcImlGenContext_t* ppcImlG
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{
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__debugbreak();
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// jump
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if (imlInstruction == NULL)
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imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
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else
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memset(imlInstruction, 0, sizeof(IMLInstruction));
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imlInstruction->type = PPCREC_IML_TYPE_CJUMP;
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imlInstruction->crRegister = PPC_REC_INVALID_REGISTER;
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imlInstruction->op_conditionalJump.jumpmarkAddress = jumpmarkAddress;
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imlInstruction->op_conditionalJump.jumpAccordingToSegment = false;
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imlInstruction->op_conditionalJump.condition = PPCREC_JUMP_CONDITION_NONE;
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imlInstruction->op_conditionalJump.crRegisterIndex = 0;
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imlInstruction->op_conditionalJump.crBitIndex = 0;
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imlInstruction->op_conditionalJump.bitMustBeSet = false;
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//// jump
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//if (imlInstruction == NULL)
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// imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
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//else
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// memset(imlInstruction, 0, sizeof(IMLInstruction));
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//imlInstruction->type = PPCREC_IML_TYPE_CJUMP;
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//imlInstruction->crRegister = PPC_REC_INVALID_REGISTER;
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//imlInstruction->op_conditionalJump.jumpmarkAddress = jumpmarkAddress;
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//imlInstruction->op_conditionalJump.jumpAccordingToSegment = false;
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//imlInstruction->op_conditionalJump.condition = PPCREC_JUMP_CONDITION_NONE;
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//imlInstruction->op_conditionalJump.crRegisterIndex = 0;
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//imlInstruction->op_conditionalJump.crBitIndex = 0;
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//imlInstruction->op_conditionalJump.bitMustBeSet = false;
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}
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// jump based on segment branches
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@ -178,10 +178,8 @@ void PPCRecompilerImlGen_generateNewInstruction_jumpSegment(ppcImlGenContext_t*
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// jump
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if (imlInstruction == NULL)
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imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
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imlInstruction->associatedPPCAddress = 0;
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imlInstruction->type = PPCREC_IML_TYPE_CJUMP;
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imlInstruction->crRegister = PPC_REC_INVALID_REGISTER;
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imlInstruction->op_conditionalJump.jumpmarkAddress = 0;
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imlInstruction->op_conditionalJump.jumpAccordingToSegment = true;
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imlInstruction->op_conditionalJump.condition = PPCREC_JUMP_CONDITION_NONE;
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imlInstruction->op_conditionalJump.crRegisterIndex = 0;
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@ -218,16 +216,16 @@ void PPCRecompilerImlGen_generateNewInstruction_conditionalJump(ppcImlGenContext
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{
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__debugbreak();
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// conditional jump
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IMLInstruction* imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
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imlInstruction->type = PPCREC_IML_TYPE_CJUMP;
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imlInstruction->crRegister = PPC_REC_INVALID_REGISTER;
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imlInstruction->op_conditionalJump.jumpAccordingToSegment = false;
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imlInstruction->op_conditionalJump.jumpmarkAddress = jumpmarkAddress;
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imlInstruction->op_conditionalJump.condition = jumpCondition;
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imlInstruction->op_conditionalJump.crRegisterIndex = crRegisterIndex;
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imlInstruction->op_conditionalJump.crBitIndex = crBitIndex;
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imlInstruction->op_conditionalJump.bitMustBeSet = bitMustBeSet;
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//// conditional jump
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//IMLInstruction* imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
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//imlInstruction->type = PPCREC_IML_TYPE_CJUMP;
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//imlInstruction->crRegister = PPC_REC_INVALID_REGISTER;
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//imlInstruction->op_conditionalJump.jumpAccordingToSegment = false;
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//imlInstruction->op_conditionalJump.jumpmarkAddress = jumpmarkAddress;
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//imlInstruction->op_conditionalJump.condition = jumpCondition;
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//imlInstruction->op_conditionalJump.crRegisterIndex = crRegisterIndex;
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//imlInstruction->op_conditionalJump.crBitIndex = crBitIndex;
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//imlInstruction->op_conditionalJump.bitMustBeSet = bitMustBeSet;
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}
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void PPCRecompilerImlGen_generateNewInstruction_conditionalJumpSegment(ppcImlGenContext_t* ppcImlGenContext, uint32 jumpCondition, uint32 crRegisterIndex, uint32 crBitIndex, bool bitMustBeSet)
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@ -4073,26 +4071,12 @@ void PPCRecompiler_HandleCycleCheckCount(ppcImlGenContext_t& ppcImlGenContext, P
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// exclude non-infinite tight loops
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if (IMLAnalyzer_IsTightFiniteLoop(imlSegment))
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return;
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// potential loop segment found, split this segment into four:
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// P0: This segment checks if the remaining cycles counter is still above zero. If yes, it jumps to segment P2 (it's also the jump destination for other segments)
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// P1: This segment contains the ppc_leave instruction
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// P2: This segment contains the iml instructions of the original segment
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// PEntry: This segment is used to enter the function, it jumps to P0
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// All segments are considered to be part of the same PPC instruction range
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// The first segment also retains the jump destination and enterable properties from the original segment.
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//debug_printf("--- Insert cycle counter check ---\n");
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// make the segment enterable so execution can return after checking
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// make the segment enterable so execution can return after passing a check
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basicBlockInfo.GetFirstSegmentInChain()->SetEnterable(basicBlockInfo.startAddress);
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IMLSegment* splitSeg = PPCIMLGen_CreateSplitSegmentAtEnd(ppcImlGenContext, basicBlockInfo);
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IMLInstruction* inst = splitSeg->AppendInstruction();
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inst->type = PPCREC_IML_TYPE_CJUMP_CYCLE_CHECK;
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inst->operation = 0;
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inst->crRegister = PPC_REC_INVALID_REGISTER;
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inst->op_conditionalJump.jumpmarkAddress = 0xFFFFFFFF;
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inst->associatedPPCAddress = 0xFFFFFFFF;
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splitSeg->AppendInstruction()->make_cjump_cycle_check();
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IMLSegment* exitSegment = ppcImlGenContext.NewSegment();
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splitSeg->SetLinkBranchTaken(exitSegment);
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